Sudden realization: I am in my final term, going to take this opportunity to learn all I can while I am in school. Gonna try hard, gonna perform, gonna succeed.
Secondly I have a thought on cache coherence related in a multiprocessor. So instead of having a single bus handled memory coherence with w/e protocol (Valid/Invalid, MOSI, MESI, etc), why can't we have multiple buses, multiple banks of cache on each processor and multiple memory (L2 would work i suppose), and then have the programmer/compiler to optimize their codes so that the runtime is fastest. Heck, we could even implement different protocols to it. But I know whatever I might have thought of in my little mind, others would have done an entire research topic on it so yeah... gonna talk to prof a little bit to see if there's any downside to it muhahaha. more costs probably, but that's a small price to pay. and scalability issues. If you can't make one thing fast enough, make 2 things that get the work done.
Next. Directory handled cache coherence, well we could split the huge directory into small "directory caches" and each "directory cache" could pick up maybe 5-10 processors, that way not all traffic has to go to the main directory. of course we would have to have a coherence problem with all the little directories, that's when we create directories for directories (DFD). as always, when in doubt, add a level of indirection. And then the DFD will face coherence problems if we break em up into little chunks. then we add another level of indirection......
man this is getting exciting, but for my professors (who I hope weren't reading this), I guess it must be either becoming more and more amusing/retarded.
oh well.
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